1. Field of the Invention
The present invention relates to a structure of a bonded composite Silicon-On-Insulator (hereafter, SOI) substrate, and a method of fabricating the same.
2. Description of the Related Art
Multi-layer-structured substrates represented by SOI substrates fabricated by substrate bonding techniques have recently found increased applications in conjunction with improvements in its bonding performance. Particularly, those SOI substrates having insulator layers such as buried silicon oxide layers have been put to practical use as dielectric isolation substrates in the fields of power ICs, etc. which require high withstand voltages. In the field of power devices, requirement for high density and high withstand voltage has been satisfied by locally providing an SOI structure on the surface of the substrate, thereby forming a high withstand voltage, vertical power MOSFET device region and a low withstand voltage, control circuit device region on a single chip. This is described in, for example, Japanese Unexamined Patent Application Disclosure (KOKAI) HEI 4-29353. A method of fabricating SOI substrates of this type will now be explained with reference to FIG. 8.
First, a surface step approximately 1 .mu.m high is formed in a given portion of the surface of an N.sup.+ type (100) silicon substrate 21 by RIE (Reactive Ion Etching) or other etching methods. This is illustrated in FIG. 8(a). A silicon oxide film 22 is formed by thermal oxidation or other methods over the entire surface of the silicon substrate 21. The elevated portion of the silicon oxide film 22 is then removed by mechanical abrasion to provide an even flattened surface composed of single-crystal silicon 21 and silicon oxide film 22. The silicon substrate thus formed will hereafter be called a "second" substrate.
Then, as illustrated in FIG. 8(b), the second silicon substrate 21 is flipped over and its flattened side surface including the silicon oxide film 22 is placed in direct contact, face to face with a main surface of an N.sup.- type (100) silicon substrate 11, which we will call as the first substrate. The composite structure obtained is then subjected to thermal annealing to ensure bonding. Finally, as illustrated in FIG. 8(c), the non-bonded surface of the second silicon substrate 21 is thinned to a predetermined thickness by a grinding and polishing process. In this way, a thin-film, single-crystal silicon layer is preferentially formed on the silicon oxide film 22. Hereafter, the single-crystal silicon layer thus formed will be referred to as the "SOI layer".
This SOI layer is further processed to form a control circuit device region in a later step. The control circuit device region is dielectrically isolated from the region for forming a vertical power MOSFET device by the now buried silicon oxide film 22 and an oxide film 22a and a polysilicon film 23 which are later formed in a V-shaped trench within the second silicon substrate 21.
Here, the buried oxide film 22 is patterned as desired, depending on the pattern of the control circuit device formed in the SOI layer on top of it. Therefore, in the early stages of the process of forming the device on the surface of the SOI layer, it is necessary to accomplish alignment of a photolithographic mask pattern and the patterns of the buried oxide film 22. However, being covered with the overlying SOI layer, the pattern of the buried oxide film cannot be observed with visible light.
One means for observing structures which are buried in bonded silicon substrates is use of images resulting from transmission of infrared light. In this connection, Japanese Unexamined Patent Application Disclosure (KOKAI) HEI 2-312220, for example, discloses an aligner based on this method. This apparatus is used for alignment of a plurality of substrates each having device layers formed thereon.
An explanation will now be given with reference to FIG. 7, regarding a method for alignment of buried oxide film patterns and mask patterns, which utilizes the principle of the infrared aligner. FIG. 7 illustrates a cross sectional view of an SOI substrate and a phtolithography mask in an initial optical alignment step for fabricating a bonding SOI substrate. Formed in a first silicon substrate 10 are oxide film patterns composed of oxide films 1b for device isolation and oxide films 1a for alignment. An SOI layer 20b is bonded on the top surface of the first silicon substrate 10 thereby constituting a bonded substrate. A photoresist film 3 is applied to the other face of the SOI layer 20b. Held above the bonding substrate is a quartz substrate 4 as the photomask which has mask patterns 5A and 5B, and both the quartz substrate 4 and the bonding SOI substrate are configured in a movable manner (a wafer chuck and other devices not shown).
With this configuration, alignment of the alignment mask patterns 5A and the alignment oxide film patterns 1a is accomplished through the use of an image provided by transmission of infrared lights 6 emitted from an infrared radiation source placed under the silicon substrate 10. This transmitted infrared image is observed with two or more infrared microscopes.
Conventional, widely used visible-light aligners cannot be used for SOI substrates with alignment patterns buried therein, and it is necessary to additionally provide an infrared radiation source, an infrared microscope, a wafer chuck which transmits infrared radiation, etc. In addition, the restricted field of view resulting from the inability to irradiate the entire surface of the substrate due to the use of an infrared source, and low contrast of the transmitted image make it difficult to recognize shapes of fine alignment patterns and thus to accomplish alignment. This, of course, presents the problem of low alignment precision of approximately .+-.1 .mu.m. Therefore, displacements due to failure in alignment have inevitably impaired the device characteristics.